Computers are known to include a central processing unit (CPU), system memory, video graphics processing circuitry, and peripheral ports, which allow the CPU to communicate with peripheral devices such as monitors, external memory, printers, the Internet, servers, etc. As is also known, the video graphics processing circuitry receives graphics data (e.g., word processing applications, drawing applications, etc.) from the CPU and/or video data (e.g., movies, television broadcasts, etc.) from a video source and processes such input data to produce pixel data. The video graphics processing circuitry stores the pixel data in a frame buffer, where memory locations of the frame buffer correspond to physical locations of a monitor. The correlation of the memory locations to physical pixel locations may be done linearly or in a tiled fashion.
Typically, the frame buffer is contained in video graphics memory associated with the video graphics processing circuitry. If the video graphics processing circuitry needs additional memory (e.g., for storing texture maps, additional video data, additional graphics data, etc.), the CPU assigns a portion of the system memory to the video graphics processing circuitry. Once the memory is assigned, the video graphics processing circuitry may access the memory via an AGP bus and a system memory controller. As such, the CPU is not involved in the video graphics processing circuitry's storage and retrieval of data from the system memory.
As the demand for complex video graphics processing increases, the video graphics processing circuitry requires additional memory. The video graphics processing circuitry may access additional system memory directly or with the assistance of the CPU. To directly access the system memory, the video graphics circuitry needs to maintain the physical addresses of assigned memory blocks of the system memory and their logical memory function (e.g., frame buffer, texture map, video data, etc.). As such, the video graphics processing circuitry would need to maintain two addressing schemes, one for memory that is accessible via the AGP bus or is contained in the video graphics memory and another for the additional memory. As is known, when the video graphics processing circuitry is addressing the system memory using an AGP address, the AGP address is an index based on a logical address (i.e., sequential addresses for memory that is assumed to be contiguous). The AGP index is provided to the system memory controller, which processes the index to obtain the corresponding physical address of the system memory. As is known, the corresponding physical address is obtained using a table look-up, such as GART. As such, with respect to the video graphics processing circuitry the index, and generation thereof, is much less complex than the physical address of the memory and generation thereof
When the CPU assists the video graphics processing circuitry in accessing the additional memory, the video graphics processing circuitry provides the index to the CPU. In response, the CPU generates the physical address, which it provides the system memory controller. While this allows the video graphics processing circuitry to only maintain a single addressing scheme, it forces the CPU to be involved, thus reducing the availability of the CPU for other tasks.
Therefore, a need exists for a method and apparatus that allows video graphics processing circuitry to extend its useable graphics memory without having to maintain multiple addressing schemes and with minimal intervention from the CPU.